x86 Instruction Set Reference

FCOS

Cosine

Opcode Mnemonic Description
D9 FF FCOS Replace ST(0) with its cosine.
Description

Computes the cosine of the source operand in register ST(0) and stores the result in ST(0). The source operand must be given in radians and must be within the range -2^63 to +2^63. The following table shows the results obtained when taking the cosine of various classes of numbers.

FCOS Results
ST(0) SourceST(0) Destination
-inf*
-F-1 to +1
-0+1
+0+1
+F-1 to +1
+inf*
NaNNaN
NOTES: F Means finite floating-point value.
* Indicates floating-point invalid-arithmetic-operand (#IA) exception.

If the source operand is outside the acceptable range, the C2 flag in the FPU status word is set, and the value in register ST(0) remains unchanged. The instruction does not raise an exception when the source operand is out of range. It is up to the program to check the C2 flag for out-ofrange conditions. Source values outside the range -2^63 to +2^63 can be reduced to the range of the instruction by subtracting an appropriate integer multiple of 2 * pi or by using the FPREM instruction with a divisor of 2 * pi. See the section titled "Pi" in Chapter 8 of the IA-32 Intel Architecture Software Developer's Manual, Volume 1, for a discussion of the proper value to use for pi in performing such reductions.

Operation
if(GetAbsoluteValue(ST(0)) < (1 << 63)) {
	C2 = 0;
	ST(0) = Cosine(ST(0));
}
else C2 = 1; //source operand is out-of-range
FPU flags affected

C1 Set to 0 if stack underflow occurred. Set if result was rounded up; cleared otherwise. Undefined if C2 is 1. C2 Set to 1 if outside range (-2^63 < source operand < +2^63); otherwise, set to 0. C0, C3 Undefined.

Floating-Point Exceptions
#ISStack underflow occurred.
#ISStack underflow occurred.
#IASource operand is an SNaN value, infinite, or unsupported format.
#DSource is a denormal value.
Protected Mode Exceptions
#NMEM or TS in CR0 is set.
Real-Address Mode Exceptions
#NMEM or TS in CR0 is set.
Virtual-8086 Mode Exceptions
#NMEM or TS in CR0 is set.
Instruction Latency Throughput Execution Unit
CPUID0F3n/0F2n0F3n/0F2n0F2n
FCOS180-280/190-240130-